Articles Tagged with ''power''

Rob Russell, VP of Satellite Business Unit atVicor, discusses the challenges for power in the LEO and MEO satellite market and how those issues are being addressed with new architectures.

Cerebras Systems’new semiconductor boasts 1.2 trillion transistors and will turbocharge AI applications.

VRMs and VRM controllers are often selected based on size, efficiency, price, or a relationship with the manufacturer. This often leads to a poor VRM selection, requiring additional engineering resources, greater time to market, as well as, higher BOM costs to correct the deficiencies. In this article, we evaluate the choices, define some useful figures of merit, and provide specific selection suggestions.

Yuiry Shelpnev argues that simulating a link in isolation from the rest of the board (localization) is probably the most important requirement to simulate interconnects predictably. Read on to understand this important concept.

配电n的一个共同的设计技术etworks (PDN) is the determination of the peak distribution bus impedance that will assure that the voltage excursions on the power rail will be maintained within allowable limits, generally referred to as the target impedance. In theory, the allowable target impedance is determined by dividing the tolerable voltage excursion by the maximum change in load current.

Passive Plus, Inc.现在提供1313 c (1.30 " x 1.30”)系列capacitor. The main features of the series are: High-Q above 10,000, low ESR, high operating voltage, high operating current, and high reliability.

Analog Devices, Inc., which recently acquired Linear Technology Corp., announces the LT4294 IEEE 802.3bt Powered Device (PD) interface controller for applications requiring up to 71W of delivered power. This new Power over Ethernet (PoE) standard – IEEE 802.3bt – increases the power budget to enable new applications and features, while supporting 10 Gigabit Ethernet (10GBASE-T) and maintaining backward compatibility with older IEEE 802.3af and 802.3at PoE equipment.

Keysightis offering a free seminar to help high-speed digital design engineers, SI and PI engineers, and design team managers, learn the skills they need to overcome signal integrity (SI) and power integrity (PI) challenges.